High density integrated circuits typically comprise numerous electrical devices and conductors that are formed on or in multiple layers of conductor and semiconductor materials. The conductor and semiconductor materials are deposited and patterned in sequence on a substrate. A dielectric material, such as silicon nitride, is typically positioned between the individual devices so as to electrically isolate the devices from one another. In particular, intermediate insulating layers, known as interlevel dielectrics (ILDs), are typically interposed between the conducting layers in a circuit so as to electrically isolate the device components formed on adjacent layers. The insulating layers prevent electrical shorts and preserve device integrity.
One common method for forming ILDs is through chemical vapor deposition (CVD). Conventional thermal CVD processes supply reactive gases to the substrate surface, where heat-induced chemical reactions take place to produce a desired film. Since the high temperatures at which some thermal CVD processes operate can damage device structures previously formed on the substrate, CVD techniques have been developed that operate at lower temperatures. One example of such a technique is plasma enhanced chemical vapor deposition (PECVD).
PECVD techniques promote the excitation and/or disassociation of reactant gases through the application of radio frequency (RF) energy to a reaction zone near the substrate surface, thereby creating a plasma which contains some highly reactive species. The high reactivity of the released species reduces the energy required for a chemical reaction to take place, and thus lowers the required temperature for such PECVD processes.
Despite the many advantages of PECVD, the films produced by conventional PECVD processes do not always have the physical properties desired for certain applications. For example, in some applications, it would be desirable to increase the compressive stress levels in silicon nitride ILD films in CMOS transistors, since doing so would increase the speed of the transistor. However, in practice, it is difficult to increase the compressive stress in such films beyond about 300–500 MPa. Moreover, even at these stress levels, significant film uniformity issues arise.
There is thus a need in the art for a method for making films, and in particular, silicon nitride films of the type suitable for ILD applications, that exhibit increased compressive stress and improved film uniformity. There is further a need in the art for high stress ILD films made by such a process, and for CMOS devices that include such ILD films. These and other needs are met by the devices and methodologies described herein.